Partial Isolation Type Saddle-FinFET(Pi-FinFET) for Sub-30 nm DRAM Cell Transistors
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چکیده
منابع مشابه
Fluorine ion implantation optimization in Saddle-Fin array devices for sub-40-nm DRAM technology
Fluorine (F) implantation with different dose post gate oxidation is used for investigating the performance of saddle-fin (S-Fin) array devices including gate-induced drain leakage (GIDL) and retention fail bit counts. Significantly lower retention fail counts of 35% were achieved in using a medium dosage of F implantation. Additional 18% retention fail count reduction was represented by F impl...
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ژورنال
عنوان ژورنال: Electronics
سال: 2018
ISSN: 2079-9292
DOI: 10.3390/electronics8010008